YongWei Wu

Yongwei Wu

Assistant Professor,

College of Integrated Circuits and Optoelectronic Chips, Shenzhen Technology University

Yongwei Wu, Ph.D., is an Assistant Professor at Shenzhen Technology University and a Senior Engineer of Electronic Components. He is recognized as a Shenzhen High-Level Talent. Following his doctoral studies, he engaged in research on novel display technologies at TCL China Star Optoelectronics Technology (CSOT) and Peking University. His research interests focus on the development of 4K/8K LCD, Mini/Micro-LED, and Quantum Dot technologies. To date, he has been granted 41 invention patents in China and the United States, including 33 as first inventor, and has published more than 20 papers. He has also led and participated in multiple research projects, including the National Natural Science Foundation of China (Youth Fund), the China Postdoctoral Science Foundation, the National Key R&D Program of China, as well as several industry R&D projects.

Title

From Inkjet Droplets to Pixels: Data-Efficient CCL Printing Optimization and Real-Time FPGA Image Enhancement

Abstract：

Artificial Intelligence is reshaping the display industry, yet its practical implementation faces challenges ranging from data scarcity in material research to hardware constraints in edge processing. This talk presents an AI-enabled, data-efficient workflow spanning display manufacturing and real-time imaging. For inkjet-printed color conversion layers (CCLs), we address a high-dimensional process space with fewer than 50 experiments. A Random Forest surrogate, validated by leave-one-out cross validation (R² = 0.58), ranks key formulation and process factors. Using a composite quality factor that jointly reflects color gamut, efficiency, and spectral stability, Bayesian optimization performs virtual screening and identifies a narrow optimum window, with matrix content of 55% to 65% and thickness of 10 to 14 μm, cutting optimization time by about 60%. For deployment-oriented imaging, we introduce a lightweight low-light enhancement CNN tailored for FPGA. With channel compression (32 to 4), pruning, INT8 quantization, and linear LUT activation approximation, the model maintains entropy at 7.01 (baseline 7.16) while improving illumination fidelity by 17% (LOE 79.77 to 66). An FPGA prototype achieves real-time 1080p enhancement at 120 fps with 1.4 W power and modest on-chip resource usage.